?001 fairchild semiconductor corporation hgtg18N120BN rev. b hgtg18N120BN 54a, 1200v, npt series n-channel igbt the hgtg18N120BN is a n on- p unch t hrough (npt) igbt design. this is a new member of the mos gated high voltage switching igbt family. igbts combine the best features of mosfets and bipolar transistors. this device has the high input impedance of a mosfet and the low on-state conduction loss of a bipolar transistor. the igbt is ideal for many high voltage switching applications operating at moderate frequencies where low conduction losses are essential, such as: ac and dc motor controls, power supplies and drivers for solenoids, relays and contactors. formerly developmental type ta49288. symbol features 54a, 1200v, t c = 25 o c 1200v switching soa capability typical fall time . . . . . . . . . . . . . . . . 140ns at t j = 150 o c short circuit rating low conduction loss avalanche rated temperature compensating saber model www.fairchildsemi.com packaging jedec style to-247 ordering information part number package brand hgtg18N120BN to-247 g18N120BN note: when ordering, use the entire part number. c e g g c e fairchild semiconductor igbt product is covered by one or more of the following u.s. patents 4,364,073 4,417,385 4,430,792 4,443,931 4,466,176 4,516,143 4,532,534 4,587,713 4,598,461 4,605,948 4,620,211 4,631,564 4,639,754 4,639,762 4,641,162 4,644,637 4,682,195 4,684,413 4,694,313 4,717,679 4,743,952 4,783,690 4,794,432 4,801,986 4,803,533 4,809,045 4,809,047 4,810,665 4,823,176 4,837,606 4,860,080 4,883,767 4,888,627 4,890,143 4,901,127 4,904,609 4,933,740 4,963,951 4,969,027 december 2001 data sheet
?001 fairchild semiconductor corporation hgtg18N120BN rev. b absolute maximum ratings t c = 25 o c, unless otherwise speci?d hgtg18N120BN units collector to emitter voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .bv ces 1200 v collector current continuous at t c = 25 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i c25 54 a at t c = 110 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i c110 26 a collector current pulsed (note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i cm 160 a gate to emitter voltage continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v ges 20 v gate to emitter voltage pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .v gem 30 v switching safe operating area at t j = 150 o c (figure 2) . . . . . . . . . . . . . . . . . . . . . . . ssoa 100a at 1200v power dissipation total at t c = 25 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p d 390 w power dissipation derating t c > 25 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.12 w/ o c forward voltage avalanche energy (note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e av 125 mj operating and storage junction temperature range . . . . . . . . . . . . . . . . . . . . . . . . t j , t stg -55 to 150 o c maximum lead temperature for soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t l 260 o c short circuit withstand time (note 3) at v ge = 15v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .t sc 8 s short circuit withstand time (note 3) at v ge = 12v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .t sc 15 s caution: stresses above those listed in ?bsolute maximum ratings may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speci?ation is not implied. notes: 1. pulse width limited by maximum junction temperature. 2. i ce = 25a, l = 400 h, t j = 25 o c. 3. v ce(pk) = 960v, t j = 125 o c, r g = 3 ?. electrical speci?ations t c = 25 o c, unless otherwise speci?d parameter symbol test conditions min typ max units collector to emitter breakdown voltage bv ces i c = 250 a, v ge = 0v 1200 - - v emitter to collector breakdown voltage bv ecs i c = 10ma, v ge = 0v 15 - - v collector to emitter leakage current i ces v ce = 1200v t c = 25 o c - - 250 a t c = 125 o c - 250 - a t c = 150 o c--3ma collector to emitter saturation voltage v ce(sat) i c = 18a, v ge = 15v t c = 25 o c - 2.45 2.7 v t c = 150 o c - 3.8 4.2 v gate to emitter threshold voltage v ge(th) i c = 150 a, v ce = v ge 6.0 7.0 - v gate to emitter leakage current i ges v ge = 20v - - 250 na switching soa ssoa t j = 150 o c, r g = 3 ?, v ge = 15v, l = 200 h, v ce(pk) = 1200v 100 - - a gate to emitter plateau voltage v gep i c = 18a, v ce = 600v - 10.5 - v on-state gate charge q g(on) i c = 18a, v ce = 600v v ge = 15v - 165 200 nc v ge = 20v - 220 250 nc current turn-on delay time t d(on)i igbt and diode at t j = 25 o c i ce = 18a v ce = 960v v ge = 15v r g = 3 ? l = 1mh test circuit (figure 18) -2328ns current rise time t ri -1722ns current turn-off delay time t d(off)i - 170 200 ns current fall time t fi - 90 140 ns turn-on energy (note 5) e on1 - 0.8 1.0 mj turn-on energy (note 5) e on2 - 1.9 2.4 mj turn-off energy (note 4) e off - 1.8 2.2 mj hgtg18N120BN
?001 fairchild semiconductor corporation hgtg18N120BN rev. b current turn-on delay time t d(on)i igbt and diode at t j = 150 o c i ce = 18a v ce = 960v v ge = 15v r g = 3 ? l = 1mh test circuit (figure 18) -2126ns current rise time t ri -1722ns current turn-off delay time t d(off)i - 205 240 ns current fall time t fi - 140 200 ns turn-on energy (note 5) e on1 - 0.85 1.1 mj turn-on energy (note 5) e on2 - 3.7 4.9 mj turn-off energy (note 4) e off - 2.6 3.1 mj thermal resistance junction to case r jc - - 0.32 o c/w notes: 4. turn-off energy loss (e off ) is de?ed as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (i ce = 0a). all devices were tested per jedec standard no. 24-1 method for measurement of power device turn-off switching loss. this test method produces the true total turn-off energy loss. 5. values for two turn-on loss conditions are shown for the convenience of the circuit designer. e on1 is the turn-on loss of the igbt only. e on2 is the turn-on loss when a typical diode is used in the test circuit and the diode is at the same t j as the igbt. the diode type is speci?d in fig. 18. typical performance curves unless otherwise speci?d figure 1. dc collector current vs case temperature figure 2. minimum switching safe operating area figure 3. operating frequency vs collector to emitter current figure 4. short circuit withstand time electrical speci?ations t c = 25 o c, unless otherwise speci?d (continued) parameter symbol test conditions min typ max units t c , case temperature ( o c) i ce , dc collector current (a) 50 0 60 25 75 100 125 150 40 30 20 10 v ge = 15v 50 v ce , collector to emitter voltage (v) 1400 80 0 i ce , collector to emitter current (a) 20 40 600 800 400 200 1000 1200 0 100 120 60 t j = 150 o c, r g = 3 ? , v ge = 15v, l = 200 h i ce , collector to emitter current (a) t j = 150 o c, r g = 3 ? , l = 1mh, v ce = 960v f max , operating frequency (khz) 5 1 10 40 20 50 10 100 f max1 = 0.05 / (t d(off)i + t d(on)i ) r jc = 0.32 o c/w, see notes p c = conduction dissipation (duty factor = 50%) f max2 = (p d - p c ) / (e on2 + e off ) 30 t c = 75 o c, v ge = 15v, ideal diode t c v ge 110 o c 12v 15v 15v 75 o c 110 o c 75 o c 12v v ge , gate to emitter voltage (v) i sc , peak short circuit current (a) t sc , short circuit withstand time ( s) 12 13 14 15 16 5 10 15 20 25 50 100 150 200 300 t sc i sc 30 250 v ce = 960v, r g = 3 ? , t j = 125 o c hgtg18N120BN
?001 fairchild semiconductor corporation hgtg18N120BN rev. b figure 5. collector to emitter on-state voltage figure 6. collector to emitter on-state voltage figure 7. turn-on energy loss vs collector to emitter current figure 8. turn-off energy loss vs collector to emitter current figure 9. turn-on delay time vs collector to emitter current figure 10. turn-on rise time vs collector to emitter current typical performance curves unless otherwise speci?d (continued) 024 v ce , collector to emitter voltage (v) i ce , collector to emitter current (a) 0 20 40 6810 60 80 pulse duration = 250 s duty cycle < 0.5%, v ge = 12v t c = -55 o c t c = 25 o c t c = 150 o c i ce , collector to emitter current (a) v ce , collector to emitter voltage (v) 40 60 80 02 4 6 810 20 100 0 t c = -55 o c t c = 25 o c t c = 150 o c duty cycle < 0.5%, v ge = 15v pulse duration = 250 s e on2 , turn-on energy loss (mj) 10 6 i ce , collector to emitter current (a) 8 4 2 15 10 5 12 25 30 0 35 40 t j = 25 o c, v ge = 12v, v ge = 15v t j = 150 o c, v ge = 12v, v ge = 15v r g = 3 ? , l = 1mh, v ce = 960v 20 3.5 i ce , collector to emitter current (a) e off , turn-off energy loss (mj) 0.5 15 10 5 1.0 2.5 1.5 3.0 4.0 4.5 25 30 r g = 3 ? , l = 1mh, v ce = 960v t j = 25 o c, v ge = 12v or 15v t j = 150 o c, v ge = 12v or 15v 35 40 2.0 20 i ce , collector to emitter current (a) t di , turn-on delay time (ns) 510 15 20 25 30 35 15 40 25 30 35 40 r g = 3 ? , l = 1mh, v ce = 960v t j = 25 o c, t j = 150 o c, v ge = 12v t j = 25 o c, t j = 150 o c, v ge = 15v 20 i ce , collector to emitter current (a) t ri , rise time (ns) 10 0 20 80 60 30 5 40 25 20 15 40 35 100 120 r g = 3 ? , l = 1mh, v ce = 960v t j = 25 o c, t j = 150 o c, v ge = 12v t j = 25 o c or t j = 150 o c, v ge = 15v hgtg18N120BN
?001 fairchild semiconductor corporation hgtg18N120BN rev. b figure 11. turn-off delay time vs collector to emitter current figure 12. fall time vs collector to emitter current figure 13. transfer characteristic figure 14. gate charge waveforms figure 15. capacitance vs collector to emitter voltage figure 16. collector to emitter on-state voltage typical performance curves unless otherwise speci?d (continued) 10 20 5 200 15 100 150 i ce , collector to emitter current (a) t d(off)i , turn-off delay time (ns) 30 350 250 300 40 35 r g = 3 ? , l = 1mh, v ce = 960v 25 v ge = 12v, v ge = 15v, t j = 25 o c v ge = 12v, v ge = 15v, t j = 150 o c i ce , collector to emitter current (a) t fi , fall time (ns) 10 5 25 100 150 15 50 200 250 30 20 40 35 r g = 3 ? , l = 1mh, v ce = 960v 125 75 175 225 25 t j = 25 o c, v ge = 12v or 15v t j = 150 o c, v ge = 12v or 15v i ce , collector to emitter current (a) 0 50 13 6891012 v ge , gate to emitter voltage (v) 11 100 150 14 15 200 t c = 25 o c t c = 150 o c t c = -55 o c pulse duration = 250 s duty cycle < 0.5%, v ce = 20v 7 v ge , gate to emitter voltage (v) q g , gate charge (nc) 5 20 0 0 100 50 150 v ce = 400v v ce = 800v i g(ref) = 2ma, r l = 33.3 ? , t c = 25 o c v ce = 1200v 10 15 200 v ce , collector to emitter voltage (v) c, capacitance (nf) 0 5 10 15 20 25 0 1 c ies 2 4 5 6 frequency = 1mhz 3 c oes c res i ce , collector to emitter current (a) v ce , collector to emitter voltage (v) 10 25 01 0 2 5 30 duty cycle < 0.5%, t c = 110 o c pulse duration = 250 s 20 15 34 v ge = 10v 5 v ge = 15v or 12v hgtg18N120BN
?001 fairchild semiconductor corporation hgtg18N120BN rev. b figure 17. normalized transient thermal response, junction to case test circuit and waveforms figure 18. inductive switching test circuit figure 19. switching test waveforms typical performance curves unless otherwise speci?d (continued) single pulse 0.5 0.2 0.1 0.05 0.02 t 1 , rectangular pulse duration (s) 10 -2 10 -1 10 0 10 -5 10 -3 10 -2 10 -1 10 0 10 -4 duty factor, d = t 1 / t 2 peak t j = (p d x z jc x r jc ) + t c z jc , normalized thermal response 0.01 t 1 t 2 p d r g = 3 ? l = 1mh v dd = 960v + - hgtg18N120BNd t fi t d(off)i t ri t d(on)i 10% 90% 10% 90% v ce i ce v ge e off e on2 hgtg18N120BN
?001 fairchild semiconductor corporation hgtg18N120BN rev. b handling precautions for igbts insulated gate bipolar transistors are susceptible to gate-insulation damage by the electrostatic discharge of energy through the devices. when handling these devices, care should be exercised to assure that the static charge built in the handler s body capacitance is not discharged through the device. with proper handling and application procedures, however, igbts are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. igbts can be handled safely if the following basic precautions are taken: 1. prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as ?ccosorbd ld26 or equivalent. 2. when devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. 3. tips of soldering irons should be grounded. 4. devices should never be inserted into or removed from circuits with power on. 5. gate voltage rating - never exceed the gate-voltage rating of v gem . exceeding the rated v ge can result in permanent damage to the oxide layer in the gate region. 6. gate termination - the gates of these devices are essentially capacitors. circuits that leave the gate open-circuited or ?ating should be avoided. these conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. 7. gate protection - these devices do not have an internal monolithic zener diode from gate to emitter. if gate protection is required an external zener is recommended. operating frequency information operating frequency information for a typical device (figure 3) is presented as a guide for estimating device performance for a speci? application. other typical frequency vs collector current (i ce ) plots are possible using the information shown for a typical unit in figures 5, 6, 7, 8, 9 and 11. the operating frequency plot (figure 3) of a typical device shows f max1 or f max2 ; whichever is smaller at each point. the information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. f max1 is de?ed by f max1 = 0.05/(t d(off)i + t d(on)i ). deadtime (the denominator) has been arbitrarily held to 10% of the on-state time for a 50% duty factor. other de?itions are possible. t d(off)i and t d(on)i are de?ed in figure 19. device turn-off delay can establish an additional frequency limiting condition for an application other than t jm . t d(off)i is important when controlling output ripple under a lightly loaded condition. f max2 is de?ed by f max2 = (p d - p c )/(e off + e on2 ). the allowable dissipation (p d ) is de?ed by p d = (t jm - t c )/r jc . the sum of device switching and conduction losses must not exceed p d . a 50% duty factor was used (figure 3) and the conduction losses (p c ) are approximated by p c = (v ce x i ce )/2. e on2 and e off are de?ed in the switching waveforms shown in figure 19. e on2 is the integral of the instantaneous power loss (i ce x v ce ) during turn-on and e off is the integral of the instantaneous power loss (i ce x v ce ) during turn-off. all tail losses are included in the calculation for e off ; i.e., the collector current equals zero (i ce = 0). hgtg18N120BN
disclaimer fairchild semiconductor reserves the right to make changes without further notice t o any products herein t o improve reliability , function or design. fairchild does not assume any liability arising out of the applica tion or use of any product or circuit described herein; neither does it convey any license under its p a tent rights, nor the rights of others. trademarks the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production optologic? optoplanar? pacman? pop? power247? powertrench qfet? qs? qt optoelectronics? quiet series? silent switcher fast fastr? frfet? globaloptoisolator? gto? hisec? isoplanar? littlefet? microfet? micropak? microwire? rev. h4 a acex? bottomless? coolfet? crossvolt ? densetrench? dome? ecospark? e 2 cmos tm ensigna tm fact? fact quiet series? smart start? star*power? stealth? supersot?-3 supersot?-6 supersot?-8 syncfet? tinylogic? trutranslation? uhc? ultrafet a a a star*power is used under license vcx?
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